Design of Power-Efficient Digital Circuits Using Gate-Diffusion Input (GDI) Technique in CMOS Process
نویسنده
چکیده
in this paper Gate diffusion input (GDI) technique of Low-power digital circuit design is described and verified in 0.18μm CMOS process. This technique permits reducing power consumption, propagation delay, and area of digital circuits of logic design. Performance comparison with traditional CMOS and pass-transistor logic design techniques is presented. These methods are compared with respect to the layout area, number of devices and power dissipation. Basic logic Gates have been implemented in various design styles. Their properties are discussed, simulation results are reported.
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تاریخ انتشار 2016